Zhenyu Wang is an Architecture Engineer with a Ph.D. in Electrical Engineering from Arizona State University, where they also held the position of Research Assistant from 2019 to 2025. Currently, Zhenyu works as a Senior Architecture Engineer at Ambarella, focusing on new architectures for AI applications. They have previously interned at MaxLinear, Intel Corporation, and TSMC, where they developed algorithms and explored hardware designs tailored for AI accelerators. Zhenyu earned both a Bachelor's and a Master's degree in Electrical Engineering from Huazhong University of Science and Technology, graduating with high honors.
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