Mark Powers

Mark Powers is a seasoned engineering professional with extensive experience in ASIC design and development. Currently serving as a Senior Principal Design Engineer at ams OSRAM since July 2023, Mark has been with ams AG as a Principal Design Engineer since August 2015. Prior experience includes a role as Senior Staff Engineer at STMicroelectronics from May 2001 to August 2015, where Mark was deeply involved in all aspects of ASIC design, including VHDL design, DFT, and various verification processes. Earlier positions include Digital Design Engineer roles at Texas Instruments and Raytheon, specializing in VHDL ASIC design. Mark holds a Master of Science in Electrical Engineering with a focus on Digital Signal Processing and Digital Image Processing from Oklahoma State University.