AVINASH M

Avinash M is a Senior ASIC Design Verification Engineer with extensive experience in ASIC verification and IP development. They have worked at Intel Corporation from 2019 to 2024, where they specialized in SOC verification, security validation, and early bug finding techniques using formal verification tools. Prior to that, Avinash held roles at CVC Pvt Ltd and SASIC Technologies, focusing on creating formal verification test cases and developing test plans for various clients. Currently, they serve as a Staff Verification Engineer at Analog Devices, continuing to contribute to the field of microelectronics. Avinash earned a Master of Technology in Microelectronics from PES Institute of Technology and a Bachelor of Engineering in Electronics and Communication Engineering from BNMIT, Bangalore.