Eşref Temel

Eşref Temel is a Senior Digital Design Engineer at Analog Devices, where they focus on advanced digital design. They have extensive experience in MATLAB model design of PHY layer algorithms for wireless communication systems, including SatCom and 5G, as well as FPGA implementation for DVB-S2X, 5G LDPC, and digital beamforming. Prior to their current role, Eşref worked as a Digital Design Engineer at YONGATEK and completed internships at Aselsan and TUBITAK. Eşref holds a Master's degree in Electronics Engineering from İstanbul Teknik Üniversitesi and completed their undergraduate studies at Orta Doğu Teknik Üniversitesi.