Michael Pakes

Michael Pakes is a seasoned engineer specializing in FPGA design with extensive experience spanning over three decades. Currently, Michael Pakes is retired but previously held the position of Senior FPGA Design Engineer at APCON since December 2013. Prior roles included positions at Overture Networks, Avnet Electronics, and Alcatel-Lucent, where Michael Pakes developed various complex designs involving Ethernet applications and system-on-chip technologies. Michael Pakes has collaborated on projects involving packet classification, Class of Service policing, and SONET designs, showcasing a deep expertise in advanced communication technologies. Educationally, Michael Pakes earned a Bachelor of Science in Electrical Engineering from The University of Texas at Arlington.