Ajay Thakur is a seasoned Design Verification Engineer with extensive experience in the semiconductor industry. Current employment at Apple commenced in December 2019, following a tenure at Intel Corporation from January 2018 to December 2019, and SmartPlay Technologies from September 2015 to December 2017, where Ajay specialized in SOC Verification. Previous roles include Consultant Engineer at PMC-Sierra (now Microsemi) focusing on SerDes Verification for mixed-signal products and Flash subsystem verification, and Senior Engineer at Mindtree Ltd, where work involved USB2.0 PHY functional verification and gate-level simulations. Early career experience includes serving as ASIC Design Engineer at Kenvivo Communications, concentrating on USB2.0 device controller verification using Verilog. Ajay holds an Advanced Post Graduate Diploma in VLSI Design from Vedant, Semiconductor Complex Limited, and a Bachelor of Engineering in Instrumentation Technology from B.V.B College of Engineering & Technology.
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