Aroop Sail

Aroop Sail is an experienced engineer specializing in circuit design and product engineering, currently serving as a SRAM Circuit Design Engineer at Apple since March 2019. Aroop previously worked at Intel Corporation as a CPU Circuit Design Engineer and held positions at Cypress Semiconductor Corporation, where responsibilities included leading characterization efforts for various projects, such as the USB-Serial Bridge Controller and CX3 USB3.0 to MIPI CSI-2 bridge. Aroop's career also includes a Circuit CAD internship at Samsung Austin R&D Center. Educational credentials consist of a Bachelor of Engineering in Electronics and Communications Engineering from R. V. College of Engineering, Bangalore, and a Master's Degree in Electrical and Computer Engineering (VLSI) from the University of Minnesota-Twin Cities.