Ashish Patil

Ashish Patil is a Senior Staff Engineer at Apple, specializing in CPU architecture and low power CPU design and verification. They hold a Master’s degree in Electrical and Computer Engineering from Portland State University and have extensive experience in digital design and RTL design. Previously, Ashish worked as a Senior Engineer at Qualcomm and held positions at Tata Elxsi, EASi, and Valeo, where they engaged in various aspects of logic design and firmware engineering. With a robust skill set that includes proficiency in hardware description languages and numerous EDA tools, Ashish is dedicated to advancing the capabilities of Apple’s SoCs.