Ashwin Raghunathan

Ashwin Raghunathan is a Silicon Architect at Apple, leveraging over 15 years of experience in analog, mixed-signal, and RF integrated circuit design. Ashwin previously held positions as a Staff Mixed-Signal IC Design Engineer at Qualcomm and a Principal RFIC Design Engineer at Humatics, among others. With a PhD focused on energy-efficient designs, Ashwin successfully developed a 28 GHz RX in 65nm CMOS during their research. Ashwin's academic credentials include an MS in Electrical & Computer Engineering from The University of Texas at Austin and a BE in Electrical Engineering from Anna University.