BP

Bindiya Padmanabha

Physical Design Engineer (STA)

Bindiya Padmanabha is an STA Engineer at Apple, where they focus on physical design engineering. They have previously worked as a Component Design Engineer and Graphics Hardware Engineer at Intel Corporation from 2015 to 2018. Bindiya gained valuable experience as a Project Intern at the Indian Space Research Organisation in 2013, where they developed a new onboard timer for spacecraft synchronization using VHDL programming. They hold a Bachelor of Engineering in Electronics and Communications Engineering from Visvesvaraya Technological University and a Master of Science in Electrical and Electronics Engineering from the State University of New York at Buffalo.

Location

Austin, United States

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