Dmitry Ischenko has extensive experience in the semiconductor industry, beginning with a role as Design Engineer at Freescale Semiconductor, focusing on post-silicon validation and verification from May 2005 to July 2006. Dmitry then contributed to the backend processes as a BackEnd Engineer at Marvell Israel Ltd. from July 2006 to September 2011, leading full chip timing signoff. Subsequently, from January 2012 to September 2013, Dmitry worked as an M.Sc. student and Teaching Assistant at Technion - Israel Institute of Technology, engaging in digital signal processing research. Dmitry joined Apple in October 2019 as a SoC Design & Integration Manager and progressed to FE CAD Manager in May 2024. Dmitry's expertise encompasses RTL design, chip integration, low power design, and static timing analysis, with a strong educational background, holding both Bachelor's and Master's degrees in Electrical and Electronics Engineering from Technion.
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