Dr. Daniel Theisz

Dr. Daniel Theisz is an experienced ASIC Design Engineering Manager at Apple since March 2020, following a tenure at Intel Corporation from 2013 to February 2020 as a technical lead specializing in post-silicon validation and characterization of high-speed serial interfaces. At Intel, Dr. Theisz was responsible for the validation of DigRF4 and MIPI MPHY protocols, overseeing IP characterization, margin testing, and development of test strategies. Prior roles included Test Chip Analyst and Test Engineer ATE, focusing on wafer and package tests for standard cells and memory test chips. Dr. Theisz holds a Doctor of Philosophy (PhD) in Physics from UC Santa Barbara and a Doktor (Ph.D.) in Physics from the University of Augsburg.