Jing Shi is a DFT Engineer with extensive experience in semiconductor design and test methodologies. Currently employed at Apple since September 2017, Jing specializes in designing Memory Built-In Self-Test (BIST), JTAG/IJTAG, and Boundary Scan systems, as well as generating and simulating ATE test patterns. Previously, Jing worked at Marvell Semiconductor, where responsibilities included implementing DFT Test Access Mechanisms and performing Conformal Equivalency checks. Earlier roles included positions as a Research Assistant at the Laboratory of Intelligent Communication, Navigation and Micro/Nano-Systems focused on firmware design and a Hardware Intern at both RAMY Technology and the Central Laboratory for Electronics and Information Technology, gaining hands-on experience in hardware design and ASIC design. Jing holds a Master's degree in Electrical Engineering from Columbia University and a Bachelor's degree in Electrical and Electronics Engineering from Beijing University of Posts and Telecommunications.