Manjunath Bhat is a skilled Cellular SoC Design Verification Engineer at Apple since December 2020, with a strong background in design verification and engineering. Previous experience includes roles as a Senior Member of Technical Staff in IC Design at Maxim Integrated, Senior Design Verification Engineer at Microchip Technology Inc., and Wipro, where tenured from December 2012 to December 2016. Early career highlights feature a position as a Senior Design Engineer at CoreEL Technologies and an internship at National Semiconductor. Client collaborations include significant engagements with Intel Malaysia, Cisco USA, and Intel USA. Manjunath earned a BE in Electronics & Communication Engineering from RNSIT Bangalore in 2009, following education at YTSS PU College and YTSS Comp. Jr. College.
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