Nirav Patel

Nirav Patel is a Senior ASIC Design Engineer at Apple, bringing over 12 years of experience in RTL Logic Design, DFT, and post-silicon debug. They previously held roles at Intel Corporation, where they led the implementation of DFT fabric for CPU subsystems, and at Xilinx as a Staff Design Engineer. Nirav began their career as a Junior Design Engineer intern at Edu Tech Systems, where they developed a Point of Source system using an 8051 controller. They earned a Master of Science in Electrical and Electronics Engineering from the University of Southern California and a Bachelor of Engineering from Gujarat University.