Rudresh Ranjan Singh

Rudresh Ranjan Singh is a Sr. Physical Timing Engineer at Apple, where they focus on static timing analysis and GPU timing. Previously, they held positions as a Sr. ASIC Design Engineer and intern at NVIDIA and Qualcomm, respectively, contributing to static timing analysis and automating timing fixes. Rudresh's educational background includes a B.Tech in Electronics from the Indian Institute of Technology, Madras, and an M.S. in Computer Engineering from Texas A&M University. Additionally, they have experience as a Design Engineer at Freescale Semiconductor and an ASIC Design Engineer at Open Silicon.