Sarathy S.

Sarathy S. is an experienced engineering professional with a robust background in physical design and CPU implementation. Currently serving as Lead at Apple since September 2016, Sarathy S. specializes in Physical Design work and Implementation. Prior experience includes a tenure as Sr Design Manager at Broadcom, leading the CPU Implementation team and delivering high-performance server processors, as well as Principal Engineer at NetLogic Microsystems, focusing on RegisterFiles and related IP. Sarathy S. also held various design roles at companies such as Altera Corp, Silicon Access Inc, and S3 Inc, where contributions included memory design, I/O design, and the development of critical components such as DDR4 complexes and SERDES blocks. Sarathy S. holds a Master’s degree in Computer Engineering from West Virginia University and a Bachelor’s degree in Electronics and Communications Engineering from Osmania University.