Sebastian Gerlich is a Senior Engineer at Apple, where they focus on silicon validation. Previously, they held the position of Senior PMIC System Integration and Verification Engineer at Intel Corporation from 2017 to 2019. Their experience includes roles as a Senior System Validation Engineer at IDT from 2015 to 2017, and as a System and Validation Engineer for Power Management ICs at zmdi from 2011 to 2015. Additionally, they worked as a Consultant at Eurospace, Altran and began their career as an intern at Philips Semiconductor in 2001.
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