Ying Wu

Ying Wu is currently serving as a Cellular RF PLL System Engineer at Apple, with experience in analog and mixed-signal IC design, specializing in Time-to-Digital Converters, Digitally Controlled Oscillators, and digital/analog PLLs. Previously, Ying held roles at MaxLinear as a Senior Staff RF/MS IC Design Engineer and at Intel Corporation as an RF PLL Engineer. Ying completed a PhD at TU Delft, contributing to the field of RF and mixed-signal design.