Hiral Tailor is an experienced engineer with a strong background in materials science and engineering. Hiral began as an undergraduate researcher at Duke University, collaborating with industry leaders such as General Motors and Bausch and Lomb on innovative projects involving atomic force microscopy and nanoindentation. Following that, Hiral worked as a graduate researcher at UC Santa Barbara, leading a project with Intel researchers to develop methodologies for energy band offsets and publishing notable research on electronic trap levels in high-ĸ dielectrics. Hiral joined Micron Technology as a CVD Process Engineer, focusing on developing and sustaining PECVD processes for high-volume manufacturing. Currently, Hiral serves as a Process Support Engineer IV at Applied Materials, supporting Intel's D1X fab for 7nm process technology. Hiral holds a Bachelor of Science in Mechanical Engineering and Materials Science from Duke University and a Master of Science in Materials Science and Engineering from UC Santa Barbara.
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