Xiaofeng Zhang

Xiaofeng Zhang is an IEEE Senior Member and a tech lead currently focused on analog and mixed-signal In-Memory Computing for machine learning systems at Applied Materials. They have extensive experience in the design and development of high-speed communication systems, particularly SERDES and ADCs, having worked with companies such as Marvell Semiconductor, Infinera, and Western Digital. Xiaofeng has successfully taped out over 30 analog/mixed-signal IC SoC chips, demonstrating first-pass silicon success throughout their career. They hold multiple degrees, including a Master’s in Optoelectronics from the Institute of Semiconductors and a Master’s in Electrical and Computer Engineering from The University of Texas at Austin.