Adarsh TP

Staff verification engineer

Adarsh TP is a seasoned engineering professional with extensive experience in verification and design roles within the electronics and communications sectors. Adarsh started in ASIC verification at Maven Silicon and progressed through various positions, including Design Engineer at Wafer Space and Senior Verification Engineer at Synapse Design Automation Inc. Notable roles include Verification Lead at Eximius Design and Lead Verification Engineer at Sivaltech. Adarsh later served as a Senior Design Verification Engineer at SatixFy Space Systems UK Ltd. before taking on the position of Staff Verification Engineer at Arm. Educational qualifications include a Bachelor's degree in Electrical, Electronics, and Communications Engineering from BTLIT and a BE in Electronics and Communication from JNV, Uduvalli.

Location

Manchester, United Kingdom

Links


Org chart

This person is not in the org chart


Teams

This person is not in any teams


Offices

This person is not in any offices