Akshay G

Akshay G is a Senior Memory Design Engineer at Arm, having joined the company in 2018 after serving as a Senior Member Technical Staff and Team Lead at DXCorr Design Inc from 2013 to 2018. At DXCorr, Akshay was involved in memory circuit design, including synchronous and asynchronous SRAM, critical path simulation, and memory characterization. They began their journey in VLSI design as a trainee at Sandeepani School of VLSI Design in 2010, and hold a B.E. in Electronics and Communication Engineering from Vidya Vardhaka College of Engineering, Mysore. Akshay completed their secondary education at Ideal Jawa Rotary High School in 2004.