Andrew Gardner

Andrew Gardner is a Senior Principal Engineer at ARM, specializing in SoC development, IP prototyping, and hardware platforms since April 2021. Previously, as a Principal Engineer at ARM from June 2011 to September 2015, Andrew led the FPGA group, focusing on the delivery of multi-FPGA implementations for CPU and systems IP validation. Andrew's experience includes a role as a Senior ASIC Engineer at ST-Ericsson, where responsibilities encompassed DFT tasks such as MBIST and testbench development, and as a Senior Engineer at Ericsson Mobile Platforms, involving firmware and hardware development for FPGA-based ASIC prototyping boards in mobile telecommunications. Initial engineering experience at BAE Systems as a Graduate Engineer involved maintenance and testing of sonar and torpedo guidance systems. Andrew holds a BEng(hons) in Electrical & Electronic Engineering from Glasgow Caledonian University. Key skills include bench-level debugging, boundary scan, and proficiency in Xilinx and CPLD technologies.