Ankit Jain possesses extensive experience in digital design engineering, currently serving as a Senior Engineer at Arm since June 2025. Prior roles include Senior Staff Digital Design Engineer at Infineon Technologies (September 2024 - May 2025), and RTL Design Engineer at Google (October 2022 - August 2024). Ankit has contributed significantly to projects at STMicroelectronics (June 2019 - August 2021) focusing on ADC scheduler RTL design, microarchitecture logic, and verification processes. Experience also includes a tenure as an ASIC Digital Design Engineer at Synopsys Inc, where Ankit explored video codec microarchitecture and optimized on-chip memory architecture. Ankit holds a Master of Technology in VLSI from Thapar Institute of Engineering and Technology and a Bachelor of Technology in Electronics and Communications Engineering from Maharshi Dayanand University.
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