Chetan Mandani is a Staff Design Engineer at ARM, specializing in front-end design work for LPDDR, DDR, and HBM technologies. They possess hands-on experience in complex system design using HDL languages and have a strong foundation in digital algorithm implementation. Prior to their current role, Chetan worked at Intel Corporation as an IP logic design engineer and held various positions including Project Lead at System Level Solutions and Sr. ASIC Design Engineer at Arastu Systems. Chetan completed a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from C.K. Pithawala College of Engineering in 2012.
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