Endre Papp

Endre Papp is a RTL Design and Verification Engineer with a robust background in verification and hardware engineering. They have held positions at ARM, where they served as a Staff Engineer and Senior Engineer, focusing on RTL design and formal verification using SystemVerilog and UVM. Prior to that, Endre worked at Duolog Technologies as an Associate Engineer, contributing to ASIC verification and test case development, and at Mentor Graphics as a Hardware Engineer, where they were involved in the design of a high-precision thermostat unit. Endre earned a Master of Science and a Bachelor of Science in Electrical and Electronics Engineering from Budapest University of Technology and Economics, and briefly attended Istanbul Technical University for an additional Master’s degree.