Gergely Tóth

Gergely Tóth is a Senior Verification Engineer at ARM, where they focus on ASIC design and verification. With previous roles as an FPGA designer at Ericsson and an ASIC Verification Engineer at Evosoft, Gergely has amassed significant experience in digital broadcast products and verification methodologies. Gergely holds a Master of Science in Electrical and Electronics Engineering from the Technical University of Budapest and participated in an Erasmus scholarship at Linköping University. Gergely is skilled in various programming languages and tools, including VHDL, System Verilog, and FPGA development with Xilinx and Altera.