Harish B

Senior Fpga Design Engineer

Harish B is a passionate FPGA Design Engineer with experience in embedded systems and telecommunications. They completed their undergraduate degree in Electronics and Communication Engineering at the Indian Institute of Space Science and Technology, Thiruvananthapuram. Harish previously worked as a Project Trainee at ISRO Satellite Centre, focusing on the MIL-STD 1553B Bus controller protocol, and as a Junior Research Fellow designing an IRNSS receiver. They held positions at Synopsys Inc and VVDN Technologies, and are currently a Senior FPGA Design Engineer at Arm, specializing in SoC design and prototyping.

Location

Cambridge, United Kingdom

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