Hien Le is a seasoned engineer with extensive experience in cache and memory subsystem design across multiple leading technology companies. Currently serving as a Senior Principal Engineer - Tech Lead at Arm since May 2022, Hien specializes in coherent interconnect, cache, and memory subsystems. Prior experience includes a Principal Engineer role at Samsung Austin Research Center focusing on architecture and design for Samsung's proprietary coherent protocol and error detection design for automotive applications, as well as significant contributions to cache and interconnect systems for flagship mobile devices. Hien also held engineering positions at Qualcomm, IBM, AMD, and Motorola Solutions, showcasing a comprehensive background in micro-architecture, design for test processes, and high-performance computing solutions. Hien earned a Master's degree in Computer Engineering from National Technological University and a Bachelor's degree in Computer Engineering from The University of Texas at Austin.
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