Jayant Bedwal is a Senior Verification Engineer currently working at Arm. They have a strong background in hardware development, with experience at Ericsson, NVIDIA, and Google, focusing on ASIC verification and development. Jayant holds a Master of Science in Computer Architecture and Embedded Systems from The University of Texas at Austin and has demonstrated expertise in Universal Verification Methodology (UVM), SystemVerilog, and various programming languages. Their previous roles include developing test plans and verification models, contributing to multi-core architectures, and creating graphical applications in game development.
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