Jayesh Parmar

Jayesh Parmar is a seasoned verification engineer with extensive experience in the semiconductor industry. Currently serving as a Principal Verification Engineer at Arm since March 2018, Jayesh previously held the position of Staff Verification Engineer. Prior to joining Arm, Jayesh worked at Intel Technology India Pvt. Ltd. from March 2012 to February 2018 as a Pre-Si Valid/Verification Engineer, where responsibilities included leading Rx path verification of the core logic for Intel Gen1 HFI ASIC. Jayesh's career also includes roles as a Sr. Engineer at QLogic, a Senior Verification Engineer at Actel, a Verification Engineer at QualCore Logic, an ASIC Engineer at eInfochips Ltd., and an Application Engineer at Bombardier Transportation. Jayesh holds a Bachelor’s degree in Electronics & Communications from Sardar Patel University, completed in 2005.