Jesvin Johnson

Jesvin Johnson is a skilled engineer with extensive experience in the field of hardware design and verification. Currently serving as a Staff Engineer at Arm since May 2020, Jesvin is involved in the FPGA team, focusing on the migration of tests between RTL and FPGA simulation platforms. Prior experience includes a role as Senior Engineering Consultant at Sondrel Ltd from January 2018 to May 2020, where responsibilities encompassed IP, subsystem, and SoC verification from planning to implementation. Jesvin's background also includes a position as a Digital Verification Engineer at EnSilica Limited and a Hardware Verification Engineer at Imagination Technologies. Jesvin holds a BEng (Hons) in Electrical and Electronics Engineering and a Master of Science in Robotics Engineering from the University of Plymouth.