Laurent Sol is a Principal FPGA Engineer at ARM, specializing in project management, FPGA, and ASIC design. With a Master's degree in Engineering from ESIEE Paris, Laurent's extensive career includes roles at major companies such as IBM, where they served as an ASIC Designer, and Synopsys, where they were a Senior Staff Application Consultant focusing on FPGA implementation and ASIC prototyping. Laurent has also contributed as a Senior Product Engineer at both Mentor Graphics and Siemens EDA, and held a position as a Principal Engineer at Synopsys, supporting key European clients.
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