Nitin Jain

Nitin Jain is a highly accomplished electrical engineer with extensive experience in timing design and analysis, specializing in digital circuits and design for test (DFT) methodologies. Currently serving as a Principal Engineer at Arm since August 2024, Nitin leads timing constraint initiatives within the DFT Engineering Team and possesses expertise in timing constraints across multiple platforms. Prior to this role, Nitin spent over 21 years at Intel Corporation, where responsibilities included overseeing full-chip timing execution for server microprocessor products, managing design teams, and developing design automation methodologies. Educationally, Nitin holds both a Master's and Bachelor's degree in Electrical Engineering from the University of Washington.