Nitin Jindal is currently a Staff Design Engineer at Arm, where they have worked since 2014, focusing on memory compiler design, including margin and performance improvement, variability analysis, and functional verification. Previously, they served as a Design Engineer at STMicroelectronics and as an R&D Engineer at Synopsys, where they contributed to memory circuit design and automation of verification flows. Nitin holds a strong background in Unix scripting, Verilog, and DFT methodologies.
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