Oliver Vecchini

Oliver Vecchini is a skilled Senior CPU/SoC Performance Engineer at Arm, with experience in modeling and analyzing CPU and SoC performance, focusing on memory systems, cache hierarchies, and interconnects. Since joining Arm in October 2021, Oliver has progressed from a CPU Graduate Engineer to a performance lead for the memory system of the next-generation Cortex-R processor. Prior to this, a CPU Engineer Intern role was fulfilled, where contributions were made to a C++ cycle-accurate simulator for Cortex-A and Cortex-R cores. Oliver holds a Master of Engineering in Mathematical Computation from UCL and has prior experience as a Software Development and IT Intern at Barings.