Rachit Gujarathi is a Senior Design Engineer at ARM, where they focus on advancing design automation and verification. They have previously held roles as a Design Automation Engineer for Intel Corporation and as a Teaching Assistant at California State University-Sacramento. Rachit holds a Master’s degree in Electrical & Electronics Engineering from California State University-Sacramento and a Bachelor's degree in Electrical Engineering from Sardar Vallabhbhai Patel Institute of Technology. Skilled in scripting languages like Perl, Python, and Tcl, Rachit has extensive experience in RTL design and verification.
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