Ramesh Bodakunta

Ramesh Bodakunta is a Principal Engineer at ARM, bringing over 14 years of experience in ASIC design focused on high-performance IP and SoC micro-architecture. Previously, Ramesh worked as a Senior ASIC Design Engineer at Intel Corporation, where they specialized in hardware accelerators and contributed to key projects including Intel's QAT IP for data centers. Ramesh's background also includes work as an FPGA Design Engineer at Nuon, Inc., and a software engineer at Infosys Technologies. They hold a Master of Science in Electrical Engineering from Arizona State University and a Bachelor of Technology in Electronics & Communications Engineering from Malaviya National Institute of Technology.