Randy Pascarella

Randy Pascarella is an accomplished Principal Design Engineer with extensive experience in systems engineering and interconnect design. Currently at Arm since July 2018, Randy leads the design of CPU cluster units, specifically the DynamIQ. Prior roles include Senior Staff Engineer/Manager at Qualcomm, where Randy micro-architected and designed server SoC cache-coherent host bridges and system transaction ordering rules between ARM and I/O interconnects. At Freescale Semiconductor, Randy was instrumental in designing QorIQ platform host bridges and led teams in multi-national implementation phases. Previous experience includes significant positions at Hewlett-Packard and Compaq Computer Corporation, where Randy was involved in the design and verification of various ASICs and server products. Randy holds a Bachelor’s degree in Computer and Electrical Engineering from Purdue University.