Shrinivas Jangale is an experienced Physical Design Methodology and CAD Engineer with a robust background in standard cell library development and physical design. Shrinivas has successfully managed teams and projects, demonstrating proficiency in RTL to GDSII flows and automation using various programming languages. Their career includes a lead design engineering role at Sankalp Semiconductor, where they oversaw a team of over 15 engineers, as well as a position at Arm as a Staff Design Engineer. Shrinivas holds a Bachelor of Engineering in Electronic and Communication Engineering from Gogte Institute of Technology, graduating with first class distinction.
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