Subrata Paul is an experienced design verification engineer currently working at Arm since August 2024, focusing on the Design Verification of next-generation ARM SOC and HBM verification. Prior to this, Subrata served as a Silicon Validation Engineer at Microsoft from August 2023 to July 2024, specializing in silicon validation for High Bandwidth Memory. Subrata has extensive experience at Intel Corporation from November 2020 to August 2023 as an Emulation Validation Engineer, and previously in various roles including UVM Engineer, SOC Design and Verification Engineer, and Emulation Engineer, contributing to areas such as FPGA prototyping, mixed-signal verification, and GPU validation. Earlier experience includes a position as an FPGA Design & Verification Engineer at Wright-Patterson Air Force Base and academic roles as a Teaching Assistant and Research Assistant at the University of Dayton. Subrata holds a Master of Engineering in Electrical and Computer Engineering from the University of Dayton and is currently pursuing a PhD at Concordia University Chicago.
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