Vincent Schuppe

Vincent Schuppe is an experienced engineering professional with a strong background in memory design and methodology. Currently serving as Principal Design Engineer/Manager at ARM since July 2004, Vincent leads the SRAM Memory compiler development team, focusing on PPA and yield methodology, quality improvements, and verification automation. Previously, Vincent held the position of Memory Methodology Lead/Manager, responsible for enhancing efficiency and driving methodology strategy within the PDG Memory IP department. Prior to ARM, Vincent worked as a Memory and Charge Pump Designer at STMicroelectronics, where responsibilities included 1TDRAM sense amplifier design and charge pump silicon testing, and as a Memory Designer at Dolphin Integration, focusing on SRAM and ROM layout. Vincent holds an educational background from the Institut supérieur d'électronique et du numérique, completed in 1999.