Vivek S

Vivek S is a Staff Engineer with extensive experience in physical design engineering, specializing in the PNR activity across Tile and Block level designs from RTL to GDSII. They have worked with various critical designs requiring high frequency, contributing to floor planning, synthesis, placement, and timing closure. Throughout their career at SignOff Semiconductors and Arm, Vivek has enhanced PNR flows and utilized tools such as Fusion Compiler and Calibre. Vivek holds a Bachelor of Engineering in Electrical and Electronics Engineering from K.S. Rangasamy College of Technology, where they graduated with a CGPA of 8.82.