Yohan Fargeix is a Staff Engineer at Arm, where they lead the memory system design team for the Arm Cortex-A CPU. Previously, they served as a Senior Engineer at Arm, focusing on RTL design for memory systems, and held various roles, including Graduate Engineer and Design Engineer, within the same company. Yohan's experience includes developing an image rendering algorithm for real-time velocity determination from space at Sorbonne Université and creating an internal chatbot for EDF's mobile application during an internship. They hold a Master's degree in Computer Hardware Engineering from Sorbonne University and a Bachelor's degree in Mathematics and Computer Science from Pierre and Marie Curie University.
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