Arteris
Benoit de Lescure has a diverse and extensive work experience. Benoit started their career in 1991 as an R&D Engineer at Thomson CSF, where they worked on real-time image processing computers and developed algorithms for military image processing and professional video applications. At Thomson, they also participated in European research projects on SIMD computers.
In 1997, they became a Project Leader for ASIC design at Thomson, where they managed a small team and was responsible for the specification and design of ASICs for voice communication, video processing, and CD audio processing. Benoit also managed subcontracting activities related to ASIC design.
In 2001, Benoit became the Group Leader for Programmable Architectures for ICs at Thomson. In this role, they managed a team and was involved in the specification and design of a SIMD/VLIW DSP for video, using VHDL and associated tools.
From 2002 to 2003, they served as the Manager of the Software team at Thomson, where they built and managed a team of 26 software engineers. Benoit was responsible for people management, cost and schedule tracking, and the implementation of a quality process. Benoit also interacted with customers to understand their needs and define specifications.
In 2003, Benoit joined Sonics, Inc. as the European Applications Manager. Benoit then became the Director of Applications Engineering Europe and later the Director of Product Management. In these roles, they were responsible for product strategy definition, product specification, and development tracking for memory solutions and software.
In 2004, they worked at Texas Instruments France as a Consultant until 2006.
Since 2013, Benoit has been working at Arteris IP. Benoit started as the Senior Director of Application Engineering and later became the Vice President of Technology. Currently, they are the CTO at Arteris IP.
Benoit de Lescure possesses a strong educational background in the field of electrical and electronics engineering. Benoit pursued a Bachelor of Science (BS) degree in Electrical and Electronics Engineering from the University of Rennes I from 1988 to 1990. Following this, they obtained a Postgraduate certificate in microelectronics from the Pierre and Marie Curie University in 1991.
In addition to their formal education, Benoit de Lescure has also acquired the Functional Safety Practitioner (FSP) certification from Exida.com GmbH in February 2018, adding to their expertise in the field.
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Arteris
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Arteris is helping power the next wave of autonomous driving, 5G and Artificial Intelligence (AI) systems fueling the growth the of the semiconductor industry. Our Network-on-Chip (NoC) interconnect semiconductor intellectual property (IP) is the on-chip communications backbone of most of the world’s most important and sophisticated systems-on-chip(SoC). Optimizing on-chip dataflow and connectivity is the cornerstone of our vision for system-on-chip development and assembly. Since our inception in 2003, we have pioneered the development and commercialization of NoC interconnect technology, cementing our position as the world’s first and largest commercial NoC interconnect IP company. Our unique technology meets the needs for cache coherent and non-coherent on-chip communications, on-chip data caching, and on-chip data protection to meet functional safety requirements.ARTERIS IP PRODUCTS AND SOLUTIONSOur on-chip NoC-based interconnect IP products make systems-on-chip easier to develop, perform better, and faster to get to market.The Arteris IP product portfolio meets the needs of design teams creating nearly any type of digital logic SoC with any type of communications semantics. Our seminal FlexNoC® Interconnect IP pioneered the market for NoC interconnects and is the industry leader. The highly configurable Ncore® Cache Coherent Interconnect IP allows optimal integration of cache-coherent Arm®-based processor IP with other cache-coherent and non-coherent IP.The growth of Artificial Intelligence (AI) and Machine Learning (ML) has inspired the creation of two innovative products. The Arteris IP AI Package is an option to Arteris FlexNoC that provides automated means to create complex topologies (meshes, rings, and tori) while adding multicast/broadcast communications, virtual channels, and source-synchronous communications to meet the unique needs of AI/ML chips. The CodaCache® Last Level Cache provides a highly configurable cache that can be instantiated anywhere within an SoC interconnect, providing data locality wherever needed.To meet the needs of the new generation of multibillion-transistor chips for automated systems with functional safety requirements, Arteris IP also offers Resilience Packages that provide hardware-based data protection technologies as well as automated diagnostic coverage analysis to help meet requirements ISO 26262 and IEC 61508 functional standards. Resilience Packages are available for FlexNoC, Ncore and CodaCache IP products.Timing closure has become a key design schedule constraint as chips have grown in size and complexity and semiconductor manufacturing process critical dimension have shrunk. To address this, Arteris IP created the PIANO® Timing Closure Package which provides physical and timing information about the interconnect to back-end synthesis place and route tools to help ensure faster timing closure.