Catherine Bertolosso

Catherine Bertolosso has extensive work experience in the field of engineering and validation. Catherine currently holds the position of Senior Staff Validation Engineer at Arteris IP since June 2021. Prior to that, they worked at Technicolor from 2009 to 2021, where they held multiple roles including Test Management Support Engineer and Validation Engineer. During their time at Technicolor, Catherine was responsible for supporting project teams in implementing test processes and tools, introducing test management tools, and creating test reports and specification documents.

Before joining Technicolor, Catherine worked at Thomson Silicon Components as a Verification Engineer from 2006 to 2009. Catherine also has experience as a Consulting Engineer at Cadence Design Systems Ltd from 2005 to 2006 and at Verisity Design EURL from 2000 to 2005. At Verisity Design EURL, Catherine was involved in pre-sales and after-sales activities, including conducting Early Project Launch and providing training to engineers.

Catherine's early experience includes working as a Hardware Engineer at Tak'Asic from 1996 to 2000.

Catherine Bertolosso started their education in 1989 at the Université de Rennes I, where they earned a DEUG A degree. Catherine continued their studies at the same university and obtained a Maîtrise degree in Electronique-Electrotechnique et Automatisme from 1991 to 1993. In 1993, Catherine attended ENIB and completed a Diplôme d'Ingénieur in Micro-électronique from 1993 to 1995. Later on, in 2009, they enrolled at the Université de Rennes I again to pursue a DU Génie Logiciel degree, but the end year is not specified in the provided information.