Bart Rutten currently serves as a Project Lead (Product Owner) for D&E DUV Wafer Stage at ASML since January 2017, also holding positions as Team Lead D&E XT DUV Wafer Positioning (Scrum Master SAFe) and Elektro-Mechanical Project Engineer. Prior experience includes working as a Project Engineer at Philips Lighting from September 2015 to June 2016, focusing on automating production systems for stadium lighting, and as an Erasmus China Intern Engineer at Jindiao Technology CO in early 2013, where responsibilities included risk analysis for CNC routers and ensuring compliance with CE standards. Bart Rutten's educational background includes studies at KU Leuven (2013-2015), Thomas More University of Applied Sciences (2010-2013), Hasselt University (2015-2016), and Wico Campus T.I.O. (2004-2010), culminating in a secondary education degree in Electricity - Electronics.
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