Darpan Daru is a Senior FPGA Design Engineer at ASML, where they currently leverage their expertise in digital system design. With previous roles as an FPGA Engineer at Ixia and Keysight Technologies, they have developed a strong foundation in FPGA optimization and SoC design. Darpan also served as a Research Assistant, focusing on HDL code generation automation using high-level synthesis tools, and was an Instructive Student Assistant during their studies at California State University, Northridge, where they earned a Master's degree in Electrical Engineering. They hold a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Gujarat Technological University.
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