JingChao Wang is a skilled professional with extensive experience in engineering. They worked at NXP Semiconductors from 2011 to 2018 as a Principle Process Engineer and Senior Product Engineer. Most recently, they served as Group Lead in D&E OPP Overlay at ASML in 2022, following their role as a Design Engineer in Overlay. JingChao holds a Master of Science in Microelectronics from Delft University of Technology and a Bachelor's degree in Electrical and Electronics Engineering from Tsinghua University.
Location
Netherlands
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